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Figure A.5: State transition rate diagram of the single processor model
Alternatively, the 2-state CTMC can be characterized with the graph shown
in Fig.
A.5,
that is often called the state transition rate diagram of the
CTMC.
The steady-state distribution of the 2-state DTMC can be found by solving
the system of linear equations
=
−
λ η
1
+ µ η
2
0
= λ η
1
−
µ η
2
0
1
= η
1
+ η
2
Note that the first two equations are linearly dependent, so that one can be
discarded.
The steady-state distribution can immediately be found to be
µ
λ + µ
,
λ
λ + µ
η =
this means for example that at steady-state the probability of the processor
being executing in its private memory is
µ
λ + µ
.
Coming now to the two-processor system, we name the two processors A
and B, and characterize the workload parameters with the appropriate sub-
scripts. We can observe that the system can be in the same five states that
were already identified in the discrete-time model:
1. both processors are executing in their private memories;
2. processor B is executing in its private memory, and processor A is
accessing the common memory;
3. processor A is executing in its private memory, and processor B is
accessing the common memory;
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