MODELS OF CONCURRENT ARCHITECTURES - Modelling with Generalised Stochastic Petri Nets - page 247

11

MODELS OF
CONCURRENT
ARCH I TECTURES

This chapter describes the GSPN-based performance evaluation of a parallel
MIMD architecture with mesh interconnection scheme. The analysis con-
siders regular computational structures in which data exchange and inter-
process synchronization require communication only among processors that
are physically connected. The effectiveness of the GSPN modelling tech-
nique for this class of architectures is shown through examples considering
both the effect of the interaction policies among processes and the benefit of
multitasking on the global e ciency of the architecture. The main value of
this example is the modular construction of the GSPN model and the pos-
sibility of developing complex models starting from simple basic building
blocks.

11.1 Concurrent Architectures

We consider MIMD architectures that use regular interconnection patterns
and distributed memory schemes [61] . The advantage and the success of
this class of architectures are related to the availability of VLSI subsystems
that can be used as building blocks of powerful massively parallel struc-
tures. In particular, different kinds of Transputer-based architectures, using
this interconnection scheme, are now available as commercial products [ 35] .
Moreover, most of the recently introduced massively parallel architectures
are based on this paradigm (see for example the CM-5 from Thinking Ma-
chines Co. based on SPARC processing units and using a fat tree intercon-
nection scheme and the T3D from Cray Research Co. based on DEC Alpha
microprocessors using a torus interconnection network) [ 34] .
In Fig. 11.1 a 3 × 3 regular mesh of processing elements is shown in which

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