Image Processing Reference
In-Depth Information
Another desirable characteristic for the QCA designs is modularity. The design
procedure should provide the possibility for the produced circuit to be modular. Al-
though this procedure is based on the division of the circuit functionality in simpler
pieces, the reverse procedure of putting them all together is not really straightfor-
ward. So, any particular QCA block, must be designed very carefully in order to
produce a functional final circuit. This modular approach in the design methodol-
ogy of QCA circuits, includes a two step procedure. First a number of basic building
block circuits are designed and simulated, and then these blocks are properly assem-
bled to produce the requested designs.
More specifically, when assembling two neighbouring blocks, the relative po-
sition of the blocks and the flow direction of the signals reaching the block edges
must be carefully handled. In order for these signals to propagate correctly from one
block to another, the QCA cells which are involved with the inter-block signal prop-
agation must be controlled by successive clocks, so that the signal will flow in the
correct direction. Additionally, when assembling two elementary building blocks,
the output signals of every block must be synchronized with the output signals of
any other block in the circuit to avoid wrong results for the case inputs from differ-
ent blocks are not received simultaneously. Consequently, all blocks must produce
the same amount of delay in clock phases, in order to be synchronized with each
other.
4.4.3
Simulation
All circuits designed according to the previous constraints should be simulated using
the simulator of the well known QCADesigner tool. QCADesigner is a QCA layout
and simulation tool developed at the University of Calgary [67] and has been used
extensively for the design and simulation of QCA circuits. First, the functionality of
each elementary building block is verified and finally the whole circuit composed of
these blocks is simulated. The circuits are redesigned in case of functionality prob-
lems and the new circuits should be re-simulated. The last procedure is repeated
until the whole circuit presents the requested behaviour. A large number of simula-
tion test vectors are produced for every circuit in order a full functionality test to be
carried out. Many simulation sessions using different simulation parameters should
be done in order to arise any possible circuit problems related with the simulation
procedure. After the functional verification of each circuit an estimation of QCA
circuit area and the maximum operational clock frequency will be calculated.
4.5
QCA Implementation of Morphological Operations
As it was presented in previous sections, the implementations of logic gates using
QCA are quite simple and regular. QCA seems to be an ideal hardware for digi-
tal signal processing applications, since it is well suited for the implementation of
many nonlinear signal and image processing algorithms [3, 45, 50]. It would be
very interesting to discover how existing algorithms could be realized using this
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