Hardware Reference
In-Depth Information
Chapter 14. External I/O Interfaces
Introduction to Input/Output Ports
Thischapter coverstheprimaryexternal peripheral input/outputportsonamodernPCsys-
tem. This includes the legacy serial and parallel ports that have been standard on PCs since
the beginning, as well as a discussion of the universal serial bus (USB, which has replaced
the older serial and parallel ports) and IEEE 1394 (also called FireWire or i.LINK) inter-
faces.IEEEstandsfortheInstituteofElectricalandElectronicEngineers.AlthougheSATA
is also considered an external I/O interface, it is a derivative of Serial ATA (SATA), which
is mainly used as an internal storage device interface. SATA is covered in Chapter 7 , “ The
ATA/IDE Interface . ” Small computer systems interface (SCSI) is another type of internal/
externalinterface;however,desktopPCstodayrarelyimplementSCSI.Ifyouwanttolearn
more about this architecture, refer to Upgrading and Repairing Servers .
We can divide external I/O connections into high-speed and low-speed variants. Currently,
thetwomostpopularhigh-speedexternalI/OconnectionsareUSBandIEEE1394.Eachof
theseinterfacetypesisavailableinseveralversions.Low-speedconnectionsincludestand-
ardserialandparallel ports(oftencalled legacy ports ),whichhavegenerally beenreplaced
by USB in newer systems and peripherals.
Serial Versus Parallel
The current trend in high-performance bus design is to use a serial architecture, in which
onebitatatimeissentdownawire.Becauseparallelarchitectureuses8,16,ormorewires
tosendbitssimultaneously,aparallelbusisfasterthanaserialbus at the same clock speed .
However, increasing the clock speed of a serial connection is much easier than increasing
that of a parallel connection, so much so that the higher attainable speeds more than com-
pletely offset the difference in the number of bits sent at a time. In the end, serial interfaces
canbedesignedtobefasterthanparallel interfaces, andformuchlesscostandcomplexity.
Parallel connections in general suffer from several problems, the biggest being signal skew
and jitter, which conspire to limit both clock speeds and signal distances. The problem in
a parallel bus is that, although the multiple bits of data are fired from the transmitter at the
same time, by the time they reach the receiver, propagation delays have conspired to allow
some bits to arrive before the others. The longer the cable, the longer the time variation
betweenthearrivalofthefirstandlastbitsattheotherend.This signal skew ,asitiscalled,
limits both clock speeds and cable lengths. Jitter is the tendency for the signal to reach its
target voltage and float above and below for a short period, which becomes pronounced at
higher speeds and at longer distances.
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