Hardware Reference
In-Depth Information
Data I/O Bus
Two of the more important features of a processor are the speed and width of its external
data bus. These define the rate at which data can be moved into or out of the processor.
Datainacomputerissentasdigitalinformationinwhichcertainvoltagesorvoltagetrans-
itionsoccurringwithinspecifictimeintervalsrepresentdataas1sand0s.Youcanincrease
the amount of data being sent (called bandwidth ) by increasing either the cycling time or
the number of bits being sent at a time, or both. Over the years, processor data buses have
gone from 8 bits wide to 64 bits wide. The more wires you have, the more individual bits
you can send in the same interval. All modern processors from the original Pentium and
Athlon through the latest Core 2, Athlon 64 X2, and even the Itanium and Itanium 2 have
a 64-bit (8-byte)-wide data bus. Therefore, they can transfer 64 bits of data at a time to
and from the motherboard chipset or system memory.
Agoodwaytounderstandthisflowofinformationistoconsiderahighwayandthetraffic
it carries. If a highway has only one lane for each direction of travel, only one car at a
time can move in a certain direction. If you want to increase the traffic flow (move more
cars in a given time), you can either increase the speed of the cars (shortening the interval
between them), add more lanes, or both.
As processors evolved, more lanes were added, up to a point. You can think of an 8-bit
chipasbeingasingle-lanehighwaybecause1byteflowsthroughatatime.(1byteequals
8 individual bits.) The 16-bit chip, with 2 bytes flowing at a time, resembles a two-lane
highway. You might have four lanes in each direction to move a large number of auto-
mobiles; this structure corresponds to a 32-bit data bus, which has the capability to move
 
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