Hardware Reference
In-Depth Information
to the cache from the main memory, meaning the processor can read it from the cache.
A cache miss is when the cache controller did not anticipate the need for a specific ad-
dress and the desired data was not preloaded into the cache. In that case the processor
must retrieve the data from the slower main memory, instead of the faster cache. Any
time the processor reads data from main memory, the processor must wait longer because
the main memory cycles at a much slower rate than the processor. As an example, if the
processor with integral on-die cache is running at 3.6GHz (3,600MHz) on a 1,333MHz
bus, both the processor and the integral cache would be cycling at 0.28ns, whereas the
main memory would most likely be cycling almost five times more slowly at 1,333MHz
(0.75ns). So, every time the 3.6GHz processor reads from main memory, it would effect-
ively slow down to only 1,333MHz. The slowdown is accomplished by having the pro-
cessor execute what are called wait states , which are cycles in which nothing is done; the
processor essentially cools its heels while waiting for the slower main memory to return
thedesireddata.Obviously,youdon'twantyourprocessorsslowingdown,socachefunc-
tion and design become more important as system speeds increase.
To minimize the processor being forced to read data from the slow main memory, two or
three stages of cache usually exist in a modern system, called Level 1 (L1), Level 2 (L2),
and Level 3 (L3). The L1 cache is also called integral or internal cache because it has
always been built directly into the processor as part of the processor die (the raw chip).
Because of this, L1 cache always runs at the full speed of the processor core and is the
fastest cache in any system. All 486 and higher processors incorporate integral L1 cache,
making them significantly faster than their predecessors. L2 cache was originally called
external cache because it was external to the processor chip when it first appeared. Ori-
ginally, this meant it was installed on the motherboard, as was the case with all 386, 486,
and first-generation Pentium systems. In those systems, the L2 cache runs at motherboard
andCPUbusspeedbecauseitisinstalledonthemotherboardandisconnectedtotheCPU
bus. You typically find the L2 cache physically adjacent to the processor socket in Penti-
um and earlier systems.
See Cache Memory ,” p. 54 ( Chapter 3 , Processor Types and Specifications ”).
In the interest of improved performance, later processor designs from Intel and AMD in-
cluded the L2 cache as part of the processor. In all processors since late 1999 (and some
earlier models), the L2 cache is directly incorporated as part of the processor die, just like
theL1cache.Inchipswithon-dieL2,thecacherunsatthefullcorespeedoftheprocessor
andismuchmoreefficient.Bycontrast,mostprocessorsfrom1999andearlierwithinteg-
rated L2 had the L2 cache in separate chips that were external to the main processor core.
The L2 cache in many ofthese older processors ran at only half orone-third the processor
core speed. Cache speed is important, so systems having L2 cache on the motherboard
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