Hardware Reference
In-Depth Information
tensions of the 286 type of MMU, so the 386 remained fully compatible with the 286 at
the system-code level.
The 386 chip's virtual real mode was also new. In virtual real mode, the processor could
run with hardware memory protection while simulating an 8086's real mode operation.
Multiple copies of DOS and other OSs, therefore, could run simultaneously on this pro-
cessor, each in a protected area of memory. If the programs in one segment crashed, the
rest of the system was protected.
Numerousvariationsofthe386chipweremanufactured,someofwhicharelesspowerful
and some of which are less power hungry.
To learn more about the members of the 386 chip family, see
Chapter 3
of
Upgrading and
Repairing PCs, 19
th
Edition
, available in its entirety on the disc packaged with this topic.
P4 (486) Processors
Although fourth-generation processors were more about refinement than redesign, the In-
tel 80486 (normally abbreviated as 486) was another major leap forward in the race for
speed. The additional power available in the 486 fueled tremendous growth in the soft-
ware industry. Tens of millions of copies of Windows, and millions of copies of OS/2,
have been sold largely because the 486 finally made the graphical user interface (GUI) of
Windows and OS/2 a realistic option for people who work on their computers every day.
The486isafamilyofprocessors,consistingofDX,SX,andanumberofothervariations.
Four main features make 486 processors roughly twice as fast as an equivalent MHz 386
chip:
•
Reduced instruction-execution time
—A single instruction in the 486 takes an aver-
age of only two clock cycles to complete, compared to an average of more than four
cycles on the 386.
•
Internal (Level 1) cache
—The built-in cache has a hit ratio of 90%-95%, which de-
scribes how often zero-wait-state read operations occur. External caches can improve
this ratio further.
•
Burst-mode memory cycles
—A standard 32-bit (4-byte) memory transfer takes two
clock cycles. After a standard 32-bit transfer, more data up to the next 12 bytes (or
three transfers) can be transferred with only one cycle used for each 32-bit (4-byte)
transfer.Thus,upto16bytesofcontiguous,sequentialmemorydatacanbetransferred
inaslittleasfivecyclesinsteadofeightcyclesormore.Thiseffectcanbeevengreater
when the transfers are only 8 bits or 16 bits each.
•
Built-in (synchronous) enhanced math coprocessor (some versions)
—The math
coprocessor runs synchronously with the main processor and executes math instruc-
