Image Processing Reference
In-Depth Information
Vertical switch
MOSFET
Row select line
Vertical
signal line
Pixel
Light
PD
Horizontal switch
MOSFET
Off-chip
preamplifier
Horizontal signal line
Column select line
Output resistor
Horizontal shift register
Video voltage V V
(a)
Switch transistor channel
PD
OFF
Q sig
Readout
V V
ON
Vertical
signal line
potential
(b)
FIGURE 5.30
Operational principle of MOS image sensor: (a) basic constitution; (b) switching mode by MOSFET.
proportion to signal charge quantity, voltage depression caused by signal current across
the output resistor is detected as output voltage by the preamplifier. In this example, the
signal charge is electrons, so signal charges flow from the PD to the video voltage source
at output operation, while current flows in the opposite direction.
Described in terms of electric circuitry, the PD is charged to video voltage V V by being
connected to the video voltage source through vertical and horizontal signal lines and
being electrically cut off to be in floating condition to start signal charge integration for
the next readout. During the exposure period, the potential of the PD decreases gradually
by discharge accompanied by integration of signal charges generated by incident light,
and is recharged to V V again by the next readout operation. The amount of signal current
compensates for the quantity of charge discharged by incident light. The voltage drop
caused by discharging current across the output resistor is detected by the off-chip pre-
amplifier. The maximum current caused by signal charges are generally some hundreds
of nanoamperes (nA) at most. And an output resistor with very high resistance cannot be
used because of the required frequency performance. Therefore, the amount of output
voltage obtained is about one thousandth or less of the output voltage of CCDs obtained by
the source follower amplifier (SFA). Thus, the current readout method is disadvantageous
compared to voltage readout using a SFA from the viewpoint of SNR.
It should be noted that the readout mode from the PD to vertical signal line is based on
switching mode, in which the potential level of the switch transistor channel is higher than
those of both the PD and vertical signal line, as shown in Figure 5.30b. It is quite different
from the charge transfer mode of IT-CCDs accompanied with complete depletion, as shown
in Figure 5.21. Hitherto, the operational principle is described by focusing on only one PD.
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