Image Processing Reference
In-Depth Information
Pixel
V R E SET
V D D
PD
Pixel array
640(H) × 428(V)
ADC ADC ADC
ADC
ADC
ADC
13-bit column-parallel ADCs
640 × 24 Latches for reset
640 × 24 Latches for signal
H. shift register and LVDS driver
FIGURE 5.60
Block diagram of a 13-bit cyclic-type ADC sensor. (Reprinted with permission from Park, J., Aoyama, S.,
Watanabe, T., Isobe, K., and Kawahito, S., Transactions on Electron Devices , 56, 2414-2422, 2009.)
resolution by oversampling and noise shaping through a highly precise analog circuit. The
sensor is made up of a pixel array, column-parallel ΔΣ ADC, SRAM buffer memory, and
controller. An ADC consists of a ΔΣ modulator and decimation filter. The device has dual-
channel output configuration with top and bottom outputs and a two-shared 2.25 μm
pitch with 2.1 M pixels. Signal from the pixel is digitized by a ΔΣ ADC and transferred to
SRAM, and output by way of a sense amplifier during the next row is converted.
Figures 5.63 and 5.64 are schematic diagrams of the column readout circuit and timing
diagram, respectively, of one horizontal conversion. A high speed of 120 fps is realized
with a horizontal period of 6.85 μs. In operation, pixel reset level output is input to a sec-
ond-order ΔΣ modulator. Since the ΔΣ modulator oversamples (110 times in this case) input
signal during conversion, there is a noise reduction effect by averaging. As modulator out-
put including noise is filtered by a second-order decimation filter whose output increases
as a second-order function of time, the number of clocks necessary to represent digital
value is considerably less than that in the cyclic type. It is therefore possible to realize high-
speed conversion. For one A/D conversion, pixel output is sampled 110 times by a 48 MHz
clock in 2.3 μs. After reset level conv ersio in is completed, the clock stops and each bit digit
of the reset level is inverted. That is, D RST is obtained from D RST as shown in the bottom of
Figure 5.64. This negative reset value is used as the initial value of the second conversion
for the signal level of the pixel. Since the difference of the digital value, which is reset level
subtracted from signal level, is obtained by this operation, digital CDS is realized.
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