Image Processing Reference
In-Depth Information
Pixel
Amplify transistor
TX
Row select transistor
Row select
pulse
Pixel output
D/A converted ramp wave
Comparator
Analog clamp
transistor
Output is inverted at
agreement of ramp
wave and pixel output
Count clock
Counter
Latch
Data output
D
0
Digital
output
Up/down
setting
Counter
Data output
D
1
Counter
Data output
D
2
FIGURE 5.56
Block diagram of a single-slope integration ADC. (Reprinted with permission from Nitta, Y., Muramatsu, Y.,
Amano, K., Toyama, T., Yamamoto, J., Mishina, K., Suzuki, A., et al.,
Proceedings of the IEEE International Solid-
State Circuits Conference, Digest of Technical Papers
, 27.5, pp. 2024-2031, San Francisco, CA, 2006.)
signaling interface are processed at high speed. Pixel output is connected to compara-
tor input by way of coupling capacitance, and ramp wave is applied to another input, as
shown in Figure 5.56 in more detail.
Comparator output is followed by a counter to which an up/down setting signal to specify
count direction is input to achieve CDS processing in the digital domain. In operation, at a
stage of reset of FD in the pixel, pixel signal input and output of the comparator is connected
by an analog clamp transistor to the clamp reset signal level. Since this operation is the same
as the clamp in analog CDS, variation of reset level as input signal to comparator is removed.
This is also effective to shorten the reset signal count period, as will be described later.
The clock number from the PLL circuit is counted to convert the reset signal to digital
code until the comparator output is inverted by agreement of ramp wave and pixel output.
Ripple counters are set to down count by up/down setting signal during reset signal and
are counted as shown in the timing chart in Figure 5.57.
After that, signal charges in the PD are read out to FD to output sensor signal at pixel
output. They are counted in the same manner with reset signal except for being set to
up counting. Since the counting directions of reset and sensor signals are opposite, the
