Image Processing Reference
In-Depth Information
hard to use as column-level ADCs. But they are suitable for chip-level ADCs, because they
have the advantage of high-speed performance. This sensor has 1.75 Tr/pixel in a four-
shared pixel configuration with 1.75 μm pixel pitch and total pixel number of 8.1 M. The
maximum frame rate is 12 frames per second (fps) with a 12-bit output.
5.3.3.2.2 Column-Level ADC Sensor
Although FPN originating from pixel characteristics can be removed by an offset cancella-
tion circuit formed at each column, light vertical bars caused by performance variation of
cancelation circuits themselves remain. And as a certain volume of capacity is necessary
to contain analog signal in the CDS circuit, the column circuit becomes vertically longer
for capacitor size along with pixel pitch shrinkage. A column ADC is an effective step
for this subject. As column-level ADCs, the single-slope integrating type in which time
information is used, successive-approximation type and cyclic type in which digital code
is encoded from the most significant bit, and ΔΣ type have been proposed.
5.3.3.2.2.1 Single-Slope Integrating Type ADC
The column-level ADC type that is used
most often in practice is the single-slope integrating type.
44,45
By combination clumping
in the analog domain with CDS in the digital region, a very low FPN level is achieved. As
Figure 5.55 shows, it is made up of the following six parts: (1) pixel array, (2) row decoder,
(3) column-parallel ADC, (4) digital-to-analog convertor (DAC) to generate ramp wave,
(5) logic control circuit, (6) and digital output interface. This sensor is driven with a 75 MHz
master clock. By the generation of four times the 300 MHz frequency of a phase-locked
loop circuit, the column-parallel ADC, single-slope ADC, and low-voltage differential
Pixel array
Pixel
Comparator
Counter
Column-parallel ADC
FIGURE 5.55
System block diagram of a single-slope integration-type ADC sensor. (Adapted from Yoshihara, S.,
Kikuchi, M., Ito, Y., Inada, Y., Kuramochi, S., Wakabayashi, H., Okano, M., et al.,
Proceedings of the IEEE
International Solid-State Circuits Conference, Digest of Technical Papers
, 27.1, pp. 1984-1993, San Francisco, CA,
2006. With permission.)
