Image Processing Reference
In-Depth Information
Q
C
sig
sig
0
∆
VVV
=−=
G
V
(5.7)
out
out
out
in
Q
C
GC
sig
QVC
=
∆
=
(5.8)
out
out
sl
V
sl
in
Then, charge quantity gain
G
Q
is expressed as follows:
Q
Q
C
C
out
sl
G
=
=
G
(5.9)
Q
V
sig
in
Thus, the charge quantity gain is a product of capacitance ratio of output to input and
voltage gain. As general parameters,
C
in
is around some femtofarads,
C
out
is some to some
tens of picofarads, and
G
V
is about 0.7-0.9 V. Hence, quantity of signal charges gener-
ated by incident light is multiplied 100-10,000 times. This is the origin of CMOS sensor
performance.
When a row to which the pixel to be read out belongs is accessed, the row select pulse
generated by the vertical access circuit (vertical shift register or decoder) is applied to the
row select transistor by way of the row select line to make it on-state to activate the SFA.
After
V
out
is output from the SFA, the reset pulse generated by the vertical access circuit is
applied to reset transistor RST to reset the PD to
V
i
0
, by discharging signal charges stored
in the
n
-type region of the PD to source voltage
V
dd
. And signal charge integration for the
next exposure starts.
As shown by Equation 5.5, the SFA output voltage depends on the
V
th
of the drive tran-
sistor. Threshold voltage has a range of variation of 10-100 mV in a whole chip imple-
mented by general large-scale integration (LSI) process technology. Since the maximum
signal level is around some hundreds of millivolts, the direct usage of SFA output
V
out
makes images with dreadful FPN of SNR less than 30 dB, reflecting
V
th
variation. This
level is never available for general applications. This phenomenon is one of the reasons for
this technology's delayed practical usage.
By replacing
V
i
0
with
V
dd
in Equation 5.5, we obtain the following equation, where
Q
sig
is
substituted by -
Q
sig
to enhance a practical case of electron signal:
Q
C
GVVG
sig
(
)
sig
V
=−
+−
(5.10)
out
V
dd
th
V
in
sig
with variable
Q
sig
is shown in Figure 5.40. Output voltage starting at zero
signal charge is (
V
dd
‒
V
th
)
G
V
, and it decreases linearly with increasing electron
Q
sig
, with
a gradient of −
G
V
/
C
in
. The gradient means sensitivity and varies in direct and inverse
proportion to
G
V
and
C
in
, respectively. Since the vertical axis of this line varies depending
on the value of
V
th
, an example is shown by the broken line in Figure 5.41. Because this
is caused by offset variation, it can be canceled by taking the difference between output
voltages with and without signal charges at each pixel. That is, FPN caused by
V
th
variance
can be eliminated. Thus, each pixel has its own line according to each different
V
th
value.
Major examples of offset variation canceling circuits are shown in Figure 5.42.
Figure 5.42a shows a differential circuit.
30
Output voltages with and without signal
charges are stored by sampling at capacitances
C
s
and
C
0
, respectively, and difference
A graph of
V
out
