Les circuits logiques - Architecture des Machines et des Systemes Informatiques - page 95

La table de vérité correspondante est (tableau 5.7) :

Ta b l e a u 5 . 7

T ABLE DE VÉRITÉ POUR L ' ADDITION DES BITS DE POIDS FORT A I ET B I .

a i b i r i - 1 c i r i

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

r i - 1

a i

c i

b i

r i

Figure 5.6 Circuit additionneur de poids fort.

Il en découle :

c abr =⋅ ⋅ +⋅ abr abr ⋅ +⋅ ⋅ +⋅ abr ⋅

i i i i 1 − i i i 1 − i i i 1 − i i i 1 −

= r ( a b ⋅ + a b) r(a b a b) ⋅ + ⋅ + ⋅

i 1i − i i i i 1i − i i i

= r (a ⊕+ b) r(a ⊕ b)

i1 − i i i1 − i i

= a i ⊕ b i ⊕ r i-1

r abr + abr =⋅ ⋅ ⋅ ⋅ +⋅ a br ⋅ +⋅ abr ⋅

i i i i 1 − i i i 1 − i i i 1 − i i i 1 −

= r (a b a b) a b r ⋅ + ⋅ + ⋅ + r)

i 1i − i i i i i i 1 i 1 − −

= r (a ⊕ b) a b + ⋅

i1 − i i i i