MCP23017 GPIO Extender - Experimenting with Raspberry Pi - page 23

Table 2-2. IOCON Register

Bit Meaning R W Reset Description

7 BANK Y Y 0 Set to 0 for interleaved access

6 MIRROR Y Y 0 Set to 1 to join INTA & INTB

5 SEQOP Y Y 0 Set to 0 for auto-address increment

4 DISSLW Y Y 0 Set to 1 to disable slew rate control

3 HAEN Y Y 0 Ignored: I2C always uses address

2 ODR Y Y 0 Set to 1 for open-drain INT pins

1 INTPOL Y Y 0 Set to 0 for INT active low

0 N/A 0 X 0 Ignored: reads as zero

GPIO Address Note

These access a shared register

A 0x0A

B 0x0B

In the tables that follow, a Y under the R (read) or W (write) column/row indicates
that you can read or write the respective value. The Reset column indicates the state of
the bit after a device reset. An X indicates a “don't care” or an undefined value when read.
An N indicates no access or no effect w hen w ritten.
The bit MIRROR=1 is used to make INT A equivalent to INT B . In other words, GPIO
A and B interrupts are reported to both pins. This allows a single pin to be used for A and
B groups.
Setting bit SEQOP=0 allows the peripheral to automatically increment the register
address as each byte is read or written. This eliminates the need to transmit a register
address in many cases.
Bit DISSLW affects the physical handling of the SDA I2C bus line.
HAEN is applicable only to the MCP23S17 SPI device, since addresses are always
enabled for I2C devices.
This project uses ODR=1 to configure the INT A pin as an open-drain pin. This
allows mult iple MCP23017 devices to share the same interrupt line. Use a pull-up resistor
on the INT line when this is in effect. Otherwise, you may experience several sporadic
interrupts.
Finally, INTPOL=0 is configured so that the interrupt is active low. This is required for
an open-drain connected line along with a pull-up resistor.