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Figure 6. FPGA-system multi-version life cycle
Figure 7. Graph of MVTs
technologies (Sklyar & Kharchenko, 2007). MVT
corresponds to a non-zero way in this graph.
Algorithms of MVT (optimal way in the graph)
selection according to a criteria “diversity (safety)-
reliability-cost” are described in (Kharchenko &
Sklyar, 2008).
a multiplication of cardinalities of sets for every
attribute. Second, dependencies exist between dif-
ferent types of the diversity (e.g., between different
manufacturers of chips and technologies of chips,
between technologies and families of chips, etc.)
For example, application of Altera chips stipu-
lates use of SRAM-FPGA technology-producing
languages, VHDL, JHDL, Case-tool Quartus
II, and their corresponding development and
verification technologies. Application of Actel
chips stipulates use of Flash-FPGA technology
and Case-tool Libero. Conversely, VHDL and
JHDL are also used in application of Actel chips
and Libero tool. There are other dependencies
Development of Multi-
Version Systems: Diversity
with Dependencies
Complexity of the diversity type choice is caused
by two reasons. First, the number of diverse ver-
sion pairs is very large. It may be determined as
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