Environmental Engineering Reference
In-Depth Information
integrated within the I&C system, and in future
it should be treated as an integral part of I&C
system's software and hardware.
Development of FPGA-based digital devices
consists of the following stages:
•
Process engineering requirements that may
be formulated by customer as an addition
to SRS requirements.
Initial information in requirements may be
both in verbal form and in the form of formalized
(problem oriented) languages describing function
algorithms.
Signal formation algorithm block-diagrams
are developed in the form as close as possible to
scheme presentation in FPGA design environ-
ment and, as a consequence, should take into
consideration the peculiarities of tools applied.
For complicated digital devices one of critical
issues is structure division into functional mod-
ules and formation of series and/or parallel tiers
of such modules.
In case the requirements to functioning algo-
rithms are presented in verbal form, at that stage
such works may be consecutively performed:
• Development of signal formation algo-
rithm block-diagrams.
• Development of signal formation algo-
rithm program models in design environ-
ment which is determined depending on
type and/or manufacturer of FPGA realiza-
tion environment applied.
•
Integration of signal formation algorithm
program models (development of digital
device integrated program model) into de-
sign environment.
•
Implementation (loading) of integrated
digital device model to FPGA.
The key term here is «signal formation algo-
rithm block-diagram» implying a certain function-
ally finite project module presented in the form
of a graphic diagram or a listing in hardware
description language (HDL). The result of each
step is a new product, the final result being a
FPGA with implemented logic structure. At each
step the developed product must be verified. The
procedures of FPGA-based I&C system develop-
ment and verification are shown in Figure 4. A
description of FPGA-based I&C system LC stages
is presented below.
Development of Signal Formation Algorithm
Block-Diagrams:
Signal formation algorithm
block-diagrams are developed as a direct prepa-
ration to development of a digital device block-
diagram in CASE-tools (design) environment.
Initial data are:
• Development of description of functioning
algorithms in a formalized language.
• Development of signal formation algo-
rithm block-diagrams as adapted to current
tools.
Development of Signal Formation Algorithm
Block-Diagram Program Models in CASE-Tools
Environment:
The initial data at that stage are
signal formation algorithm block-diagrams. De-
velopment of signal formation algorithm block-
diagram program models in design environment
is performed using specialized CASE-tools com-
prising a library of typical functional elements
and blocks.
In the course of development signal forma-
tion algorithms and FPGA logic structure are
presented in the form of visualized conditional
graphic images (block-diagrams). It should be
noted that the development of signal formation
algorithm block-diagram program models and
FPGA program model is similar to the process
•
SRS (functional general and non-function-
al - general safety requirements) with due
consideration of function distribution be-
tween software and hardware.
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