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zones. Information in the furthest downstream cell(s) of the “upstream” circuit
zone is always also held in the furthest upstream cell(s) of the “downstream”
circuit zone, since these two groups of adjacent “boundary cells” are identically
clocked. Dissipation analysis of the upstream zone can thus neglect any apparent
contributions from the clock phase where information is erased from the furthest
downstream cells, since this information also belongs to the furthest upstream
cells of the downstream circuit zone, and any dissipation that would result from
irreversible erasure of this information in a subsequent clocking phase will be
captured in analysis of the downstream zone.
This simple constraint on circuit decomposition results in major simplifica-
tion of the dissipation analysis. Dissipative contributions from each circuit zone
can be calculated independently and added, and the effects of cross boundary
interactions captured by the general analysis are properly reflected. Further-
more, the only circuit zones that are necessarily dissipative - those designated
as “dissipation zones” - are those enclosing majority gates; there is no irreversible
information loss in zones that correspond to wire segments and inverters. Dis-
sipation analysis thus requires only that the dissipation zones be identified and
their contributions calculated.
The analysis is simplified even further by the fact that, on each “use,” dissi-
pation zones defined as above irreversibly lose information during one and only
one clock transition: the clock transition in which the information-bearing state
of the “core” of the dissipation zone - the device cell and surrounding identically
clocked cells belonging to the input and output legs ((a) in Fig. 7 ) - is relaxed.
With this, we proceed to modular dissipation analysis of the adder circuit
of Fig. 2 . One can immediately identify N diss
= 5 dissipation zones, which are
delineated and labeled in Fig. 8 .
These dissipation zones can be analyzed separately, with each regarded as
an independent “information processing artifact” ( cf. Fig. 1 ). As per Eq. ( 3 ), the
amount of energy dissipated in the processing of each input by the circuit is
5
Δ↕E B d n
ΔE diss =
(6)
n =1
where Δ↕E B d n is the amount of energy dissipated during the critical clock phase
in dissipation zone d n . Δ↕E B d n
is lower bounded as [ 2 ]
Δ↕E B d n ≥ k B T ln(2) ΔI d n
(7)
where ΔI d n is the amount of information irreversibly lost from zone d n during
the dissipative clock phase. Using the same assumptions of pure, orthogonal QCA
data states that were made in general analysis of Sect. 3.1 , ΔI d n = H n ( X|Y )
where H n ( X|Y ) is the conditional Shannon entropy for the zone (gate) input
and output random variables X and Y . Obtaining the probability mass functions
(pmfs) for the various gate inputs that result from a uniform adder input pmf,
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