Understanding a Bisferrocene Molecular QCA Wire - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 320

molecules can be bonded through the thiol element [ 21 ]. During the technologi-
cal processes, possible fabrication defects may happen [ 23 ]. For this reason, it is
important to classify the possible defects and analyze their effects on the molec-
ular wire, generating thus a Safe Operating Area (SOA) that highlights the fault
tolerance of the molecular QCA wire.
Defects Classification. As mentioned above, some defects may occur when
fabricating the gold substrate and after depositing the molecules on the gold
nanowire. These defects are schematically classified in Fig. 19 : misalignment of
two nearby molecules, due to the gold grain irregularity (Fig. 19 (A)); a variation
in the vertical distance between the active dot axis of two nearby molecule, as a
consequence of the gold layer roughness (Fig. 19 (B)); different distances between
two nearby molecules, due to the different number of spacers placed in between
them (Fig. 19 (B)). These defects might cause faults and misbehaviors of the cells
in the molecular wire.
Methodology. In order to perform a fault tolerance analysis for a molecular
QCA wire, a methodology that could be adopted focuses on a part of the molec-
ular wire made of the following elements: an ideal driver emulated with the point
charge system as described before, a bis-ferrocene molecule (defined as molecule
under test, MUT) and an ideal receiver that acts as third molecule. In particular,
the bis-ferrocene is considered in its oxidized form (a positive net charge) and so
the ideal driver is modeled with a single positive point charge. When no defects
occur (as in the ideal case), the driver is located at an ideal distance d equal
to the distance between Dot1 and Dot2 of MUT (equal to 1.0 nm), so that a
squared QCA cell is formed along with the receiver and the MUT. Furthermore,
the logic state of the driver is given by the position of the positive point charge
as shown in Fig. 20 : when it is localized on Dot1, the driver is in the logic state
1 (Fig. 20 (A)); while, the charge localization on Dot2 encodes the logic state 0
(Fig. 20 (D)). So, the MUT is affected by the presence of a polarized driver and,
as consequence, it should encode a logic state opposite to the one of the driver
(Fig. 20 (B) and (E)). The dot charges of the MUT ( Q1 and Q2 ) in a specific
logic state generate an electric field as shown in Fig. 20 (B) and (E), that at the
same time affects the receiver through the above mentioned equivalent voltage.
Therefore, the effect of the equivalent voltage should be such that it leads the
receiver in a logic state opposite to the one of MUT, thus making the information
propagate along the wire.
Regarding the real fabrication defects, they could be modeled varying the
position of the driver with respect to the MUT as sketched in Fig. 21 : the mis-
alignment between the driver and the MUT that occurs along the dot axis is
defined as X - displ , since in the ab-initio simulation the two working dots are
located along the X axis; the variation of the driver-MUT distance with respect
to the ideal distance d is called ( Y - displ ); the vertical displacement of the driver
from the ideal position is defined as ( Z - displ ).