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a big area overhead. In case of NML circuits the price that must be paid to
achieve complete delay independence is much higher. There are two reasons
behind this fact: the signal coding and the communication protocol. With this
logic, signals are coded using two bits, that means that circuit area is at least
two times higher with respect to a not-coded circuit, but in NML more area
means more delay. NCL logic is also an asynchronous logic and as a consequence
it uses a communication protocol, which plays an important role in the overall
performance losses. Figure
8
shows the communication protocol used. Circuits
can be generically represented by blocks of combinational logic embraced by
two asynchronous registers which implement the communication protocol. The
communication protocol works following the step explained in Fig.
8
.Firstanew
DATA is sent to the circuit (Fig.
8
(A)). When the DATA reaches the second
register, an acknowledgment signal is sent back to the first register (Fig.
8
(B)).
The first register then sends a NULL to the circuit (Fig.
8
(C)). When the NULL
is received by the second register, an acknowledgment is sent back to the first
register (Fig.
8
(D)) and a new cycle can start. While this communication protocol
works very well, it requires a signal to traverse the circuit four times. As a
consequence every DATA cycle requires a time equal to four times the signal
propagation delay of the circuit. This explains the high losses of performance
due to the use of NCL logic.
Fig. 8.
NCL asynchronous protocol. (A) A DATA is sent to the circuit. (B) An acknowl-
edgment that states the reception of the DATA is sent back. (C) A NULL is sent to the
circuit. (D) An acknowledgment that states the reception of the NULL is sent back.
Other types of asynchronous logic with a simplified communication protocol
can be studied and possibly adopted to improve performance. However asyn-
chronous logic is based by definition on a communication protocol which uses
messages between units to assure signals synchronization. The problem is that
in this kind of technology the delay penalty along interconnections is very high.
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