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of a QCA circuit is provided by its clock [
22
], the dissipated power can be mea-
sured by the power provided by the clock, i.e.,
P
clock
. Previous research [
34
]has
shown that the power dissipated in the clocking wires is fairly small and that
dissipation in the QCA devices themselves will dominate the power dissipation.
Even if the power losses in the clock wire are large, these power losses are not
data dependent, thus they will not affect the results of a power analysis attack
[
32
]. Therefore, only the power dissipated by the QCA cells is considered.
(a)
(b)
Fig. 2.
Power dissipation in QCA: (a) Power flow in a QCA cell; (b) Power dissipation
in CMOS and QCA circuits.
As typical switching in QCA is not purely adiabatic, power consumption is
unavoidable. The upper bound of quasi-adiabatic power dissipation is reached
with non-adiabatic clocking. The best case scenario for attackers is considered by
using the upper bound power of QCA circuits to determine if they are vulnerable
to power analysis attack. An upper bound power dissipation model [
30
] is used,
which has been derived from a quasi-adiabatic model [
22
]. In this section, an
overview of the upper bound power model is presented. The validity of the
upper bound power is confirmed by calculating the actual power dissipated for
various levels of clock smoothness in a QCA cell. Then the power dependence
on the Hamming distance in QCA cells and basic components under different
tunnelling energy levels and temperatures is illustrated.
2.1 Upper Bound Power Model
A Hamiltonian matrix can be used to describe the total energy of a QCA cell.
Using the Hartree-Fock approximation [
35
] and assuming that only Coulombic
interactions apply between cells, the matrix representation of the Hamiltonian
for an array of cells is [
22
,
30
]:
H
=
−
2
i
E
k
x
i
f
i
=
−
,
1
1
2
G −γ
−γ
−γ
2
i
E
k
x
i
f
i
(2)
1
1
2
G
−γ
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