Information Technology Reference
In-Depth Information
Reading.
One of the greatest advantages of using the MTJs over single layer
nanomagnets is the ability to use their electrical resistance to read from the
logic. The variable electrical resistance originates from the stacked composition
and alignment of the two ferromagnetic layers (free and fixed) with their non-
magnetic separation. Several studies have gone into improving the MR ratio for
enhanced readibility at room temperature. Typically in memory, the bits are
read by comparing their resistance against a reference value. This reference is
typically maintained at the mid point of the resistances of the two logic states.
In our logic, we can however take advantage of the bit to bit coupling to generate
a reference free reading. Eliminating the need for reference reduces the cost of
read circuit. In this section we will describe how we can read from the logic
without using a reference value.
The read circuit is shown in Fig.
7
b. It performs a differential read by com-
paring the output against its complementary value. The main advantage of this
type of reading is its high sense margin. The read circuit is also non-destructive,
which means that the values in the output cells are not disturbed during the
read process. This is possible because the read current is much lower than the
critical current for switching. Hence, the overall read circuit is also low power.
Moreover, the read operation is made tolerant to the variations in the output
MTJs by (i) regenerating a copy of both the output and its complement; and
(ii) comparing a pair of the output states (
M
1
a
,
M
1
b
) against a pair of the com-
plementary states (
M
2
a
,
M
2
b
). This averages out the variations and improves
the overall sense margin.
The read circuit operates in two phases: the precharge and the sense phase.
In the precharge phase, transistors
M
3
and
M
4
are turned off and transistors
M
7
,
M
8
and
M
9
are turned on. Together with
M
5
and
M
6
they help the nodes
X
and
Y
to rise to
V
DD
at the end of the precharge phase. At the start of the sense
phase, transistors
M
7
,
M
8
and
M
9
are first turned off. A small potential
V
read
is then applied to transistors
M
3
and
M
4
. The unequal resistances in the two
arms, caused by the pair of complementary MTJ states, gives rise to a potential
difference across
X
and
Y
. This potential difference is sensed by the comparator
and a decision is taken on the output state. More in-depth analysis of the read
circuit is available in [
24
,
31
].
4.4 Execution Time of 2-Input Exclusive-OR
The output generation in cell
X
13
(Fig.
6
) can be subdivided into five different
time zones.
(i)
Time zone
1
:
Duration
t
w
, when the inputs are written into cells
X
1
···X
4
.
(ii)
Time zone
2
:
Duration
t
clk
, when the cells
X
5
···X
7
and
X
8
···X
10
are
clocked.
(iii)
Time zone
3
:
Duration
t
clk
, when the cells
X
11
and
X
12
are clocked and
the cells
X
5
···X
7
and
X
8
···X
10
are released.
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