STT-Based Non-Volatile Logic-in-Memory Framework - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 177

The basic logic construct in this computation is the 3-input majority voter [ 16 ]
(Fig. 4 b). In addition to the magnetic fields required to write the inputs into the
nanomagnets, a clocking field was also required to be provided [ 17 , 18 ]. The pur-
pose of the clock was to take the nanomagnets to their hard axis or orthogonal
to the easy axis (see Fig. 4 a). The hard axis is the energy maximum state for
any nanomagnet. When released from this state, the nanomagnets can effectively
respond to the weak magnetostatic coupling from the neighbors and compute
any logic function. There are two types of magnetostatic coupling: ferromag-
netic and antiferromagnetic (see Fig. 4 c and d). The ferromagnetic coupling is
equivalent to the logical buffer while the antiferromagnetic coupling is equivalent
to the logical inverter. With clocking, the elongated nanomagnets can also be
used to propagate information [ 19 ]. Clocking also helps in ordering the nano-
magnets [ 20 , 21 ]. The remanence in the nanomagnets stores their states when no
fields are applied to them. This means any NML function is non-volatile and has
no leakage power.
The clocking and the writing fields are generated by current carrying wires
placed underneath the nanomagnets [ 17 , 22 ]. The current required to generate
the required fields ranges in mA for a 100 50 nm 2 nanomagnet. Moreoever,

the current requirement scales inversely to the nanomagnet dimensions, making
the overall technology non-scalable. Also, the fields cannot be precisely focussed
only on the desired nanomagnets. This gives rise to stray fields that increase
the chance of writing and clocking errors. There are also no well-defined on-chip
read techniques. Till date NML mostly relies on magnetic sensors for reading.
These issues diminishes the zero leakage computing advantage of NML.
Computing with the help of magnetostatic coupling between the free layers
of MTJs can solve some of the above problems and still provide a zero leakage
computing platform. Additionally, such logic would also benefit from the techno-
logical advancements already made in STT-MRAM and at the same time enjoy
the properties characteristic of STT-MRAM like thermal robustness, radiation
hardness and unlimited endurance. In this chapter we will discuss this STT-
based computing platform [ 23 - 25 ] that can switch between logic and memory
mode of operations with an acting clock as a classifier.

×

4 STT-Based Logic-in-Memory Architecture

In this architecture, the free layers of the MTJs operate both in computational
and storage mode. The storage is through remanence in the free layer. The com-
putation is through magnetostatic interaction between free layers of neighboring
MTJs. The computation style is very similar to NML, differing only in the STT
based write, clock and MR based read mechanisms. The architecture framework
is again very similar to STT-MRAM. The MTJs are arranged in a crossbar fash-
ion, which allows accessing them through rows and columns. The architecture
is also very regular with bit, source and word lines running parallel to rows and
columns of MTJs.