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Fig. 2. (a) Switching to logic 0; (b) Switching to logic 1. τ p refers to torque responsible
for precessional motion, τ d refers to torque responsible for damping and τ st refers to
spin transfer torque. I 0 and I 1 refers to the switching current through the MTJ.
The critical current density to switch the MTJs is given by Eq. 6
J w = 2 eαM S t F ( H K ± H ext +2 πM S )
η
(6)
where, symbols are defined in Table 1 . η is the spin transfer eciency and is
given by η = p/ (1
is for switching to logic 1 and 0 respectively.
Interestingly, the critical switching current (Eq. 6 ) is proportional to the device
dimensions. This means, that the current will scale with device dimensions unlike
external fields required to switch the device. The STT-MRAM memory locations
are written with the help of this spin transfer torque.
The spin transfer torque was first formulated by Slonczewski and was included
in 1996 to the LLG equation Eq. 1 . For the physics behind the spin transfer
torque switching, readers are once again encouraged to consult Refs. [ 8 , 13 ].
± p ). The
±
2.3 STT-MRAM Architecture and CMOS Integration
The most popular STT-MRAM architecture is a crossbar array of 1T1MTJ
cells (one transistor-one magnetic tunnel junction) (see Fig. 3 a). Each MTJ in
the STT-MRAM is accessed using their access transistors and bit (BL), source
(SL) and word (WL) lines (see Fig. 3 b). The thermal robustness of MTJs has
helped to integrate them monolithically with CMOS using standard back-end-of-
line (BEOL) manufacturing techniques [ 3 ]. In STT-MRAM, MTJs are typically
fabricated between metal layers M3 and M4 [ 14 ]. Figure 3 b shows a cross-section
of the CMOS MTJ integration [ 15 ].
3 Nanomagnetic Logic
Use of magnets in the computing world was limited until recently to only infor-
mation storage. Information propagation with the help of magnets was first
demonstrated in 2000 by Cowburn and Welland [ 5 ]. In their work they used single
layer single domain circular nanomagnetic dots. The magnetostatic interaction
 
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