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10 Discussion and Conclusions
This work proposes testable reversible sequential circuits based on conservative
logic. Conservative logic is testable for any unidirectional stuck-at faults using
only two test vectors, all 0s and all 1s. The proposed conservative reversible
sequential circuits have feedback that deters their testing by only two test vec-
tors, thus a technique is demonstrated to disrupt the feedback in test mode.
Experimental simulation on a single missing/additional cell defect has verified
the application of the conservative logic towards fault testing in QCA computing.
A new conservative gate (Mx-cqca gate) that is not reversible is also proposed
especially suiting QCA computing. There are some major challenges associated
with Mx-cqca based designs. Researchers have proposed several implementation
techniques for QCA devices such as semiconductor, molecular QCA and mag-
netic QCA. However QCA devices are dicult to fabricate due to defects such
as cell displacement, cell misalignment and cell omission Thus, all the fabricated
and tested QCA designs are limited to small logic gates such as majority voter,
fanout, and wire design. Thus, until a complex design such as an adder, mul-
tiplier and memory components are fabricated and tested in QCA computing;
research community would have to wait to practically realize the Mx-cqca based
designs. Further, the current literature lacks in the research about synthesis of
QCA circuits. There is no synthesis tool for mapping HDL descriptions to QCA
designs and to their corresponding QCA layouts to enable simulation using the
QCADesigner tool. Thus, in order to implement Mx-CQCA based designs, a
synthesis tool is needed that will be equivalent of an HDL description to layout
generation tool in conventional CMOS computing is needed. There is also a need
of a tool that can approximate the power dissipation in proposed Mx-cqca based
design.
The proposed sequential circuits based on conservative logic gates outper-
form the sequential circuit implemented in classical gates in terms of testability.
As the sequential circuits implemented using conventional classic gates does not
provide inherited support for testability. A conventional sequential circuit needs
modification in the original circuitry to provide the testing capability. Also as the
complexity of a sequential circuit increases the number of test vector required
to test the sequential circuit increases rapidly. For example, to test a general
sequential circuit more than 2000 test vectors are required to test stuck at faults
of the entire circuit, while if the same sequential circuit is build using proposed
reversible sequential building blocks it can be tested using only two test vec-
tors. The main advantage of proposed conservative logic gate based reversible
sequential circuits compared to the conventional sequential circuit is that, the
number of test vectors required to test the reversible sequential circuit is always
two test vectors and the complexity of the circuit does not impact the number
of test vectors. The proposed design of reversible sequential building blocks min-
imizes the overhead of test time for a reversible sequential circuit. A limitation
of the proposed work is that it cannot detect multiple missing/additional cell
defects. In conclusion, this work advances the state of the art of testing reversible
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