Majority Logic Synthesis Based on Nauty Algorithm - Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives - page 111

Fig. 2. Four phases of the QCA clock

2.2 QCA Clock

The QCA clock controls the barriers between the quantum dots in QCA cells. It works
in a pipeline fashion [ 17 ], which is performed in four clock phases: Switch, Hold,
Release and Relax, as shown in Fig. 2 .

• Switch phase: During the switch phase, the tunnel barrier begins to rise slowly and
the polarization of the cell is influenced by its neighbor cells (which are now in their
Hold phase).
• Hold phase: The polarization is complete and the barrier reaches its peak. In the
meantime, the cells affect their neighboring cells and pass information.
• Release phase: The barrier begins to lower and the cells lose their polarization.
Signals carried by these cells should have been passed to their neighbors.
• Relax phase: The tunneling barrier is in the lowest state and the QCA cells will
remain unpolarized.

All the four clock phases constitute one clock cycle, in which one bit of information is
passed to its neighbor. As the QCA clock continues, the information propagates
through the QCA circuit.

2.3 QCA Devices

A QCA wire is a sequence of QCA cells as shown in Fig. 3 . The signal applied to the
first cell propagates along the wire with the QCA clock.
A QCA majority voter can perform a three-input logic function following the rule
that the output signal is always decided by the value of the majority of the inputs. The
logic function for a majority voter, shown in Fig. 4 , is given by Eq. ( 1 ). By forcing
one of the three inputs of the majority gate to either logic ''0'' or ''1'', a two-input
AND or a two-input OR gate can be realized as shown in Eqs. ( 2 ) and ( 3 ),

respectively.

Fig. 3. A QCA wire