Graphics Reference
In-Depth Information
Fig. 5.7
In most local algorithms, cost aggregation is carried out by filtering the DSI according to
different strategies
techniques implemented in the internal logic of the FPGA, in order to enable parallel
access required to sustain parallelism. Of course, in the outlined constrained com-
puting architecture, the overall portion of the DSI highlighted in the figure must be
stored in the internal memory of the FPGA, typically in the block RAM. Neverthe-
less, with WVGA imaging sensors (even with imaging sensors at higher resolution)
and typical disparity range deployed in practical applications, this amount of data
becomes compatible with the internal memory made available by FPGAs similar to
those previously examined.
In local algorithms, the best disparity for each point is often identified according
toasimple
winner-takes-all
(WTA) strategy by finding the candidate with the best
aggregated cost. For the reasons previously outlined, local algorithms are inherently
parallel, and hence are ideal candidates for FPGA implementation. Detailed reviews
and evaluations of local stereo algorithms can be found in [
15
,
31
,
33
,
36
,
42
].
5.5.1.1 Fixed Window Algorithm
In spite of their simplicity and intrinsic parallel nature of local algorithms, even the
mapping of the simplest approach to the constrained target architecture outlined in
previous sections should be carefully planned. The simplest local algorithm is often
referred to as fixed window (FW) or
block matching
and simply sums up/averages
all the matching costs within the support window. Although this algorithm has some
well-known limitations, such as inaccurate depth reconstruction near depth disconti-
nuities and, as most local algorithms, problems in uniformly textured regions of the
sensed scene, it is often deployed in several practical applications, thanks to its over-
all robustness in determining the rough 3D structure of the scene and to its simple
algorithmic structure.
