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vision more suitable to a wider range of applications has been the recent availability
of low-cost powerful computing platforms such as FPGAs, GPUs, and CPUs with
DPS capabilities. Of course, stereo vision technology intrinsically provides RGB or
monochrome images, and thus belongs to the class of RGBD sensors. Compared to
active technologies such as structured light or ToF, stereo vision may provide unreli-
able results in regions where the correspondence problem becomes ambiguous (e.g.,
in poorly textured regions or in presence of repetitive patterns along image scan-
lines). However, compared to active technologies, it is well suited to both indoor and
outdoor environments, as well as to close-range and long-range depth measurements
by simply changing the relative position of the digital imaging sensors and/or their
optics. Finally, being a passive technology, multiple stereo vision sensors sensing the
same area do not interfere with each other enabling multicamera setups. Neverthe-
less, despite these positive aspects and a widespread deployment in many research
applications in the last few decades, stereo vision is often perceived as a bulky and
expensive technology not suited to mainstream or consumer applications. In this
paper, we will try to address this concern by outlining a simple and cheap computing
architecture mainly based on low-cost FPGAs. We will also review a subset of state-
of-the-art stereo matching algorithms that have the potential to entirely fit within this
constrained architecture without other external device (e.g., FIFOs, DDR memories,
etc.), with the exception of a high-speed communication controller. In some cases,
the constraints imposed by such simplified computing architecture require modi-
fications to the original algorithms that will be discussed in the remainder of this
chapter. The topic addressed in this paper is related to an ongoing research activity
aimed at developing a cheap, accurate, self-powered RGBD sensor based on stereo
vision technology, deploying as a computing platform only the reconfigurable logic
available in standard low-cost FPGAs. This choice has several advantages and also
some limitations that will be discussed in the remainder of this chapter.
Figure
5.1
reports preliminary experimental results, computed on a frame of the
KITTI dataset [
10
], concerned with three algorithms discussed in this chapter and
implemented on the constrained computing architecture. Additional and updated
results can be found here.
1
5.2 Related Work
Dense stereo vision has been a widely researched topic for decades [
31
] and, due to
its highly demanding computational requirements, many different computing plat-
forms (e.g., CPUs, GPUs, DSPs, FPGAs, ASICs, etc.) have been deployed to obtain
depth maps (hopefully) in real time. However, some of these computing architec-
tures, such as those based on standard CPUs or GPUs, are currently ill-suited to
1
Videos and applications of the 3D camera are available at this links:
