Hardware Implementation of Embedded Fuzzy Controllers on FPGAs and ASICs - Fuzzy Modeling and Control: Theory and Applications - page 240

Fig. 13.9 Control surfaces for the double integrator problem provided by fuzzy controllers using
FuzzyMean ( FM ),Weighted FuzzyMean ( WFM ), first-order Takagi-Sugeno ( TS1 ), and hierarchical
implementation ( HIE ). MSE values versus the optimal solution used to adjust the fuzzy controllers
are also shown
Table 13.7 Number of slices and maximum frequency (inMHz) for fuzzy controllers implemented
on different FPGA devices of Spartan 3A, 3A-DSP, and 6 families
FPGA Device FM WFM TS1 HIE

xc3s700a (180 / 64.73) (247 / 60.05) (231 / 60.00) (214 / 57.80)

xc3sd1800a (173 / 66.33) (231 / 52.15) (219 / 62.95) (214 / 53.06)

xc6slx45t (73 / 113.456) (91 / 85.40) (106 / 94.96) (85 / 91.79)

(Multipliers / RAM Blocks) (4 / 1) (6 / 2) (7 / 3) (4 / 2)

Last row shows independent-device resources

implementations of these controllers are illustrated in Fig. 13.9 . XFL3 specifications
were tuned using numeric data from an optimal control surface and the supervised
learning tool of Xfuzzy , and then synthesized by means of xfsg . Required resources
andmaximumoperation frequencies achieved for implementation of these controllers
on different FPGA devices of Spartan-3A, Spartan-3A-DSP, and Spartan-6 families
are shown in Table 13.7 . Resulting circuits are able to operate above 50 MHz in
low-cost Spartan-3A and 3A-DSP FPGAs, and near 100 MHz in Spartan-6 devices.