Hardware Implementation of Embedded Fuzzy Controllers on FPGAs and ASICs - Fuzzy Modeling and Control: Theory and Applications - page 228

the knowledge of an expert operator and using the xfedit 's interface, or they can
be extracted from numerical data using the identification algorithms provided by
xfdm . For a better performance, system parameters can be adjusted by the supervised
learning algorithms included in xfsl . To complete the description and tuning stages,
membership functions and rule bases can be simplified with xfsp to improve their
linguistic interpretability.
The development environment includes three tools to carry out the functional ver-
ification stage. xfplot allows analyzing the input-output relations of the system by
providing 2D and 3D graphical representations. The influence of membership func-
tions and rule bases can be graphically evaluated using xfmt . Finally, xfsim allows
simulating the closed-loop behavior of the fuzzy system in combination with a Java-
codified model of the plant. Once validated the XFL3 specification, software synthe-
sis tools included in Xfuzzy are able to translate it into C, C++, or Java code that can
be cross compiled and executed in a general-purpose processor, thus providing a fully
software solution for implementing embedded fuzzy controllers. As a peculiar char-
acteristic of Xfuzzy , this environment also provides two synthesis tools for hardware
implementation of fuzzy inference systems. These tools, which will be described and
compared along this chapter, are based on two different design strategies, but share
the common architecture for efficient hardware implementation of fuzzy modules
detailed in the next Section.

13.2.1 Active-Rule Based Architecture for Fuzzy Systems

The concept of active-rule based architecture for fuzzy hardware implementation
was introduced by several authors along the nineties as a mechanism to reduce the
resource consumption and to increase the inference speed associated to parallel and
serial architectures of fuzzy systems (Chiueh 1992 ; Eichfeld et al. 1992 ; Sánchez-
Solano et al. 1997 ). In particular, the circuit structure proposed in (Sánchez-Solano
et al. 1997 ) provides low-cost and high-speed implementations of digital fuzzy
systems by resorting to the following three keys: to use a processing strategy that
evaluates only the contribution of the active (no null) rules; to restrict the shape and
overlapping degree of input membership functions; and to employ only simplified
defuzzificationmethods that do not require sweeping all the elements of the universes
of discourse of the output variables.
The block diagram of this architecture, shown in Fig. 13.2 , illustrates the elements
needed for the calculation of fuzzy inference based on Mamdani's ( 13.1 ) and first-
order Takagi-Sugeno's ( 13.2 ) models. In the input stage, blocks called membership
functions circuits (MFC) evaluate the input values and provide as many pairs “label,
activation degree” as overlapping degree has been fixed for the system.

The different combinations of these labels will determine the possible rules that are
activated. In the following stage, the inference process is carried out by sequentially
processing the active rules by means of an active-rule selection circuit composed by
a counter-controlled multiplexer array (MUX). In each clock cycle, the membership

( L i ,µ i )