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[210] W. F. McColl and M. S. Paterson, “The Planar Realization of Boolean Functions,” Info.Processing
Letters 24 (1987 ), 165-170.
[211] W. S. McCulloch and E. Pitts, “A Logical Calculus of the Ideas Immanent in Nervous Activity,”
Bull.Math.Biophysics 5 (1943), 115-133.
[212] R. McNaughton and H. Yamada, “Regular Expressions and State Graphs for Automata,” IEEE
Trans.ElectronicComputers EC-9 (1960), 39-47.
[213] C. Mead and L. Conway, IntroductiontoVLSISystems, Addison-Wesley, Reading, MA, 1980.
[214] C. A. Mead and M. Rem, “Cost and Performance of VLSI Computing Structures,” IEEEJ. Solid
StateCircuits SC-14 (1979), 455-462.
[215] G. H. Mealy, “A Method for Synthesizing Sequential Circuits,” Be lSyst.Techn.J.34 (1955),
1045-1079.
[216] K. Mehlhorn, “Some Remarks on Boolean Sums,” ActaInformatica 12 (1979), 371-375.
[217] K. Mehlhorn, “ AT 2 Optimal VLSI Integer Division and Integer Square Rooting,” Integration 2
(1984), 163-167.
[218] K. Mehlhorn and Z. Galil, “Monotone Switching Circuits and Boolean Matrix Product,” Com-
puting 16 (1976), 99-111.
[219] K. Mehlhorn and F. P. Preparata, “Area-Time Optimal Division for T
1 +
=
O ((log n )
) ,” Info.
andComputation 72 (1987), 270-282.
[220] K. Mehlhorn and E. M. Schmidt, “Las Vegas Is Better than Determinism in VLSI and Distributive
Computing,” Proc.14thAnn.ACMSymp.TheoryofComputing(1982), 330-337.
[221] K. Mehlhorn and U. Vishkin, “Randomized and Deterministic Simulations of PRAMs by Parallel
Machines with Restricted Granularity of Parallel Memories,” Acta Informatica 21 (1984), 339-
374.
[222] F. Meyer auf der Heide, “A Comparison Between Two Variations of a Pebble Game on Graphs,”
Theoret.Comp.Sci.13 (1981), 315-322.
[223] E. F. Moore, “Gedanken-Experiments on Sequential Machines,” in Automata Studies (Annals of
MathematicsStudies,No.34), Princeton University Press, Princeton, NJ, 1956, 129-153.
[224] D. E. Muller, “Complexity in Electronic Switching Circuits,” IRETrans.Comput. EC-5 (1956),
15-19.
[225] D. E. Muller and F. P. Preparata, “Minimal Delay Networks for Sorting and Switching,” Proc. 6th
Ann.PrincetonConf. InformationSciencesandSystems(1972), 138-139.
[226] D. E. Muller and F. P. Preparata, “Bounds to Complexities of Networks for Sorting and Switching,”
JACM 22 (1975), 195-201.
[227] J. Myhill, “Finite Automata and the Representation of Events,” Wright Patterson AFB, Technical
Note WADD 57-624, Dayton, OH, 1957.
[228] J. Myhill, “Linear Bounded Automata,” Wright-Patterson Air Force Base, Ohio, WADD Tech.
Note, 1960.
[229] A. Nerode, “Linear Automaton Transformations ,” Proc.Amer.Math.Soc.9 (1958), 541-544.
[230] E. I. Neciporuk, “A Boolean Function,” Dokl.Akad.NaukSSSR(SovietMath.Dokl.) 169 (1966),
765-766, (in Russian); English translation in Soviet Math. Dokl. 7 (4) (1966), 999-1000.
[231] E. I. Neciporuk, “A Boolean Matrix,” Probl. Kibern. 21 (1969), 237-240, (in Russian); English
translation in Systems Theory Research 21(4) (1971), 236-239.
[232] M. H. Nodine and J. S. Vitter, “Large-Scale Sorting in Parallel Memories (Extended Abstract),”
Proc.3rdAnn.Symp.ParallelAlgorithmsandArchitectures(1991), 29-39.
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