Digital Signal Processing Reference
In-Depth Information
Tutorial 52
Q: A block diagram of a delta modulation system is shown below, along with the
input signal. The step of the integrator is arranged to be 0.2 V, while the sampling
frequency is f
s
= 1 kHz. Plot on the same figure the estimated signal and the
output waveform. Assume that the integrator output was initially zero and the
quantizer output is 1. Suggest a demodulation circuit.
Clock (
f
s
)
e
(
t
)
1
y
(
t
)
x
(
t
)
−1
−1
Quantizer
^
x
(
t
)
Integrator
∫
Solution: The sampling period is T
s
= 1/f
s
= 1/1000 = 1 ms. The plots are as
shown below.
1
−1
0
1
2
3
4
5
20
t
, ms
T
s
y
(
t
)
^
x
(
t
)
1
−1
k
0
1
2
3
4
5
20
t
, ms
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