Digital Signal Processing Reference
In-Depth Information
Fig. 4.11
Nodes to be scaled
d
d
w
(
n
)
1
2
y
(
n
)
x
(
n
)
a
0
z
-
1
b
a
z
-
1
b
a
2
z
-
1
b
a
3
For instance, in the first-order IIR filter shown in Fig.
4.10
, f(n) = a
n
U(n).
Then the summation in (
4.30
) is reduced to
1
1
1
j
a
j
c
¼
:
ð
4
:
31
Þ
For a = 0.975, the scale will be c = 1/40. The price to be paid for this
avoidance of overflow is a reduction in the SNR which accompanies the scaling.
In practice, the digital filter structures are much more sophisticated than the
first-order IIR filter considered above. Therefore, one typically needs to scale
several nodes to ensure no computational overflow. So, to put (
4.30
) in a general
form, let f
m
(n) and F
m
(z) denote the impulse response from the input to the mth
internal node and its corresponding transfer function, respectively. Then, the
scaling factor for the mth node is given by
1
P
k
¼
0
j
f
m
ð
k
Þj
:
c
m
¼
ð
4
:
32
Þ
If all nodes satisfy this scaling condition, then the entire structure is said to be
scaled. However, it can be shown that normally, only those nodes that are inputs to
multipliers must be scaled [
4
]. Consider the system depicted in Fig.
4.11
, for
example. In this system every ''multiplier'' is merely a delay version of the signal
w(n). Hence, it is adequate to simply scale node d
1
along with the output node d
2
.
It is worth mentioning that there are several approaches for scaling. The scaling
technique described in (
4.32
) is both necessary and sufficient to guarantee a
complete overflow free structure, however, it is relatively strict. A less stringent
scaling technique can be realized by ensuring that the following condition is
verified
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