Digital Signal Processing Reference
In-Depth Information
sec), and the quantization step is D ¼ 0 : 21 volt. It is assumed that at t = 0, the
integrator output is zero (i.e., x ð 0 Þ¼ 0), and the quantizer output is 1. At t = 0, the
integrator starts integrating, and since its input is 1, the output grows linearly with
time. Its output is D R t
0 1 : dt ¼ t : At the next sample instant t = T s , the error is
e ð t Þ¼ x ð t Þ x ð t Þ \0 since the estimate x ð t Þ¼ D ¼ 0 : 21 is more than the signal
x ð t Þ¼ sin ð 0 : 2p T s þ 0 : 1 Þ¼ 0 : 162 : Accordingly, the quantizer output flips to -1
and remains at that value until the next sampling instant t = 2T s . In the mean-
while, because the integrator input is negative, its output decreases linearly with
time until t = 2T s .Att ¼ 2T s ; x ð t Þ [ x ð t Þ; hence e(t) [ 0, and the quantizer output
flips to +1. This causes the integrator to linearly increase again. At t = 3T s , the
error remains positive and so there is no change in the quantizer output, etc.
The 1-bit output of the DM effectively turns out to be a pulse width modulated
waveform. That is, the greater the amplitude of the input signal, the more often the
binary output is ''on''. To demodulate the output signal one needs to take the signal
estimate x ð n Þ; and then use a low-pass filter to remove the heavy quantization
noise.
The accuracy of A/D conversion increases when either (i) the step-size is
decreased, or (ii) when successive samples are highly correlated as is normally
achieved if the samples are closely-spaced in time. Now the samples will be
closely spaced if a high sampling rate is used, and for this reason DMs and other
low-bit quantization systems usually use high sampling rates. These rates are
typically much higher than the Nyquist rate corresponding to the input signal,
hence the name oversampling A/D converters.
Because timing can be controlled much more easily and accurately than voltage
levels, increasing the sampling rate tends to be less expensive than increasing the
word length. For this reason 1-bit ADCs are less expensive than multibit ADCs,
and are widely used for audio applications.
If the step-size is decreased to the point where the slope of the DM integrator
(i.e., D = T s ) is less than the slope of the input signal, a slope-overload distortion
will occur. In this case, the DM is unable to correctly encode the signal, as
illustrated in Fig. 3.33 for the scenario where x ð t Þ¼ 2 sin ½ 2p ð 0 : 1 Þ t þ 0 : 1 ; f s ¼
10 Hz ; and step-size D ¼ 0 : 1. On the other hand, if a large D is used such that the
DM slope is much larger than the signal slope in some interval, another kind of
1
kT s
−1
Fig. 3.33
Slope-overload distortion in DM
 
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