Digital Signal Processing Reference
In-Depth Information
PED
e ( t )
x ( t )
y ( t )
LPF
v o ( t )
VCO
Fig. 3.10
A block diagram of a generic analog phase-locked loop
slowly according to a feedback error signal. Because it adjusts slowly it is unable
to follow perturbations due to noise—it is therefore quite resilient to the effects of
noise. There are two major categories of PLLs, namely, analog PLLs (APLLs) and
digital PLLs (DPLLs). Both of these are covered below.
3.4.1 Analog Phase-Locked Loops
Figure 3.10 shows a block diagram of an analog phase-locked loop. A PLL is a
feedback system that essentially tries to replicate the oscillation present in the
input signal but shifted down by the carrier frequency, and without the random
noise present in the input. It also tries to ensure that the output phase is as near as
possible to the input phase. As will be seen subsequently, the PLL is very useful
for demodulating frequency modulated (FM) signals.
The PLL consists of three major parts: the phase-error detector (PED), the loop
filter which is a LPF which diminishes random noise, and the voltage-controlled
oscillator (VCO).
Consider a frequency-modulated input signal with the following form:
2
3
2pf c t þ 2pa Z
t
4
5
x ð t Þ¼ cos ½ / ð t Þ ¼ cos ½ 2pf c t þ h ð t Þ ¼ cos
m ð t Þ dt
ð 3 : 15 Þ
0
where m(t) is the message signal which must be transmitted in a communications
system. The instantaneous frequency (IF) of the signal is given by:
f ð t Þ¼ 1
2p
d ½ / ð t Þ
dt
¼ f c þ am ð t Þ
ð 3 : 16 Þ
Hence, the frequency of the signal is varied in proportion to the message signal,
i.e., x(t) is a frequency modulated (FM) signal. Note that if the phase /(t) were to
vary linearly with the message, i.e., if h(t) = am(t), then x(t) would be a phase-
modulated (PM) signal.
The VCO in the PLL is an oscillator whose output frequency varies linearly
with its input voltage, as specified by the following equation:
 
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