Digital Signal Processing Reference
In-Depth Information
5
0
f , Hz
−5
−10
−15
f s = 44.1 kHz
−20
−25
= 0.999
α
−30
α
= 0.98
−35
α
= 0.95
−40
−100
0
100
200
300
400
500
600
700
800
900
1000
f s = 44.1 kHz, α = 0.99 , DC component = 4v , f i = 400 Hz
6
Input signal (DC − shifted)
4
2
Output signal (DC − free)
0
−2
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time, sec
f s = 44.1 kHz,
α
= 0.99 , DC component = 4v , f i = 20 Hz
6
Input signal (DC − shifted)
4
2
Output signal (DC − free, but attenuated)
0
−2
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
Time, sec
Fig. 2.42
Frequency and time-domain performance of the DC Blocker
 
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