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benchmark computes the parameters g and L (communication and synchroniza-
tion cost) for the MultiBSP model. It is adaptable to any hierarchical architec-
ture and its output is a structure with the information of each level, useful for
programming applications following the MultiBSP model.
We applied the benchmark to characterize and evaluate two actual HPC mul-
ticore systems. In order to validate the results, we designed and implemented a
particular problem in the MultiBSP model, and predicted its execution costs.
The results demonstrated that the execution time can be satisfyingly predicted
when using the information from the benchmark, especially for the dell32 ma-
chine.
The main lines for future work are related to verify the results of the MB-
SPDiscover benchmark using a suite of algorithms, and extend the library for
heterogeneous multicore clusters by including a network level.
Acknowledgements. This research is partly funded by the STIC-AmSud pro-
gram partners MINCyT (Argentina), Inria (France), and ANII (Uruguay),
through the SEHLOC project.
References
1. Bisseling, R.: Parallel scientific computation: a structured approach using BSP and
MPI. Oxford University Press, Oxford (2004)
2. Bonorden, O., Juurlink, B., von Otte, I., Rieping, I.: The Paderborn University BSP
(PUB) Library. Parallel Comput. 29(2), 187-207 (2003)
3. Broquedis, F., Clet-Ortega, J., Moreaud, S., Furmento, N., Goglin, B., Mercier, G.,
Thibault, S., Namyst, R.: Hwloc: A generic framework for managing hardware ani-
ties in HPC applications. In: 18th Euromicro Conference on Parallel, Distributed
and Network-based Processing, pp. 180-186 (2010)
4. Hill, J., McColl, B., Stefanescu, D., Goudreau, M., Lang, K., Rao, S., Suel, T.,
Tsantilas, T., Bisseling, R.: BSPlib: The BSP programming library. Parallel Com-
puting 24(14), 1947-1980 (1998)
5. Lobachev, O., Guthe, M., Loogen, R.: Estimating parallel performance. J. Parallel
Distrib. Comput. 73(6), 876-887 (2013)
6. Savadi, A., Deldari, H.: Measurement latency parameters of the MultiBSP model:
A multicore benchmarking approach. J. Supercomput. 67(2), 565-584 (2014)
7. Valiant, L.: A bridging model for parallel computation. Commun. ACM 33(8),
103-111 (1990)
8. Valiant, L.: A bridging model for multi-core computing. J. Comput. Syst. Sci. 77(1),
154-166 (2011)
9. Yzelman, A.N.: Fast sparse matrix-vector multiplication by partitioning and re-
ordering. Ph.D. thesis, Utrecht University, Utrecht, the Netherlands (October 2011)
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