Biomedical Engineering Reference
In-Depth Information
7.5.2.1 wireless Power and data Interface
A 4-MHz LC tank with on-chip resonant capacitor, full-wave rectifier, storage capacitor, low drop-
out voltage regulator, and RF limiting circuit provide a stable supply and overvoltage protection to
the implant electronics. Schottky contact barrier diodes are used in the bridge rectifier circuit to
improve the frequency response and lower the turn-on voltage. As shown in Figure
7.18
a, Ti-Si
2
Schottky barrier diodes are fabricated in standard 0.6-µm CMOS process by selectively blocking
the n+/p+ implants in desired diffusion areas [
61
]. The measured I-J characteristic of the Schottky
barrier devices is shown in Figure
7.18
b. The devices have an ideality factor of ~1.16 and barrier
height of ~0.5 eV, which was computed using the Richardson-Dushman equation for the therm-
ionic current [
62
]. The measured turn-on voltage is ~300 mV, which is lower than standard pn
junction based implementations [
63
]. The diodes are fabricated with small schottky contact area
as this yields a higher cutoff frequency [
64
], and multiple cells are placed in parallel to improve the
current handling capability. Figure
7.18
c shows the transient regulator response when an externally
generated 0- to 2-mA load step is applied as the link is powered by the primary coil voltage. The
measured response is within 15% (or 600 mV/4.1 V) of the target 4.1-V supply. The regulator
exhibits a load regulation of 2 mV/mA (or 240 ppm/1 mA), a line regulation 2 mV/V, and a low
dropout voltage of 50 mV. At 4 MHz, the worst-case measured peak-to-peak ripple voltage at the
output is within 100 mV. A battery management circuit has been implemented to charge and moni-
tor the external Li ion cell battery [
61
]. Charging profile experiments for the battery control loop
(Figure
7.18
d) shows that during the constant-current phase, the circuit delivers 1.5 mA, result-
ing in a linear increase in battery voltage. The end-of-charge (EOC) during the constant-voltage
phase is detected once the battery current reaches 5% of the nominal constant charging current of
1.5 mA, triggering the EOC signal. An on-chip CDR circuit is used to download external system
commands. Synchronization of clock and data is achieved via a modulation scheme based on am-
plitude shift keying and pulse position modulation facilitates CDR using an ASK demodulator and
a charge-pump with latched comparator. The CDR is operational for an input data range of 4-18
kb/sec, and exhibits a sensitivity of 3.2 mV p-p at 1 MHz.
7.6 SUMMaRy
The breadth of challenges that stand between concept generation and realization of the next
generation of BMIs calls for tandem and synergistic development of the many facets of neuro-
technology. Here, we have provided several examples of how the goal of system development (as
opposed to component development) of a fully integrated BMI implant is leading to beyond-
state-of-the art technologies that might not be realized readily in a piecewise fashion. To de-
velop the necessary signal processing, neural interfaces, or electronics independently, as has been
