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the GP-SCL application
first requires calculation of the ground state of the system,
achieved by the imaginary-time propagation until convergence is reached, and then,
starting from this result, one can study the dynamics of the system through the real
time-propagation. A workflow concept uni
es these two kinds of time-propagation
algorithms into a single task, hiding the complexity from the end user. Furthermore,
besides the results in the form of raw data that describe the propagation of
the system in time, AEGIS CMPC scienti
c gateway provides visualization of the
propagation in the form of graphs and movies.
In the case of the (Q)SPEEDUP codes, numerical convergence of quantum-
mechanical transition amplitudes to their continuum values is achieved only when
the number of Monte Carlo samples goes to in
nity. The central limit theorem
states that the statistical distribution of numerical results obtained using a large
number of independent Monte Carlo samples is always a Gaussian. This allows
automation of a process workflow for a desired maximal error of calculated tran-
sition amplitude, which is introduced as a new, more generic input parameter. In
other words, for a described physical system of interest and prede
ned acceptable
error of the result, AEGIS CMPC SG workflow provides suf
cient statistics in
execution of the code to achieve the desired accuracy of the amplitude.
15.3 Architecture of the Science Gateway
AEGIS CMPC science gateway has been developed to support SPEEDUP,
QSPEEDUP, and GP-SCL applications. These programs are fully written in the C
programming language, and do not depend on any external library. Codes could be
compiled with different popular compilers: GNU
'
s gcc compiler, Intel
'
s icc com-
piler, IBM
s suncc (former Sun)
compiler. Besides serial versions of the codes, parallel versions are produced as
well. In the case of SPEEDUP and QSPEEDUP applications, parallelization is
achieved through the message passing interface (MPI), while the GP-SCL code is
parallelized using OpenMP API. All codes are accompanied by appropriate
make
'
s xlc compiler, PGI
'
s pgcc compiler, and Oracle
'
cation of the compiler, type of parallelization, and
customization of compiler optimization flags. These make
les, which allow speci
cant
role in the porting process, and simplify utilization of various hardware resources.
Although applications use different algorithms, from a purely technical point of
view they have the common use scenario: for a particular description of physical
system of interest, given in the form of a single input
les play a signi
file, after considerable
number-crunching each application produces corresponding output with numerical
results. The generated numerical results are analyzed, classi
ed, and visualized by
the scienti
c gateway. This allows for the creation of a generic architecture for all
AEGIS CMPC applications.
The generic architecture behind the AEGIS CMPC scienti
c gateway is illus-
trated in Fig. 15.1 . It consists of four main blocks: the AEGIS CMPC portal, the
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