Supporting USB - USB Mass Storage: Designing and Programming Devices and Embedded Hosts - page 40

share 1 KB of buffer memory. Endpoints can use double buffering for more
efficient transfers. For isochronous transfers, USB data can transfer directly
to and from a streaming parallel port (SPP).
For each enabled endpoint address, firmware must reserve memory for a
buffer and a buffer descriptor. The microcontroller's CPU (in other words,
the device firmware) and the USB controller's SIE share access to the buffers
and buffer descriptors. The UOWN bit in the buffer descriptor's status reg-
ister determines whether the CPU or SIE owns the resources. The SIE has
ownership when data is ready to transmit and when waiting to receive data
on the bus. When the SIE has ownership, device firmware shouldn't attempt
to access the buffer or buffer descriptor except to read the UOWN bit.
When readying an endpoint to perform a transfer, the last operation the
firmware should perform is updating the status register to set UOWN to
pass ownership to the SIE. When a transaction completes, the SIE clears the
UOWN bit, passing ownership back to the CPU.
The buffer descriptor consists of four registers. The buffer descriptor status
register contains status information and the two highest bits of the end-
point's byte count. The functions of the status bits change depending on
who owns the buffer descriptor: the CPU (Table 2-2) or the SIE (Table 2-3).
The byte-count register's eight bits plus the two bits in the status register
contain the number of bytes to be transmitted or sent in an IN transaction
or the number of bytes expected or received in an OUT transaction. The
address-low and address-high registers contain the 16-bit starting address for
the endpoint's buffer in RAM.
In firmware, each endpoint buffer descriptor has a name that uses this for-
mat:
ep<#>B<d>
where # is the endpoint number and d is the direction, with i = IN and o =
OUT. In the code below, MSD_BD_IN is the buffer descriptor for end-
point 1 IN and MSD_BD_OUT is the buffer descriptor for endpoint 1
OUT:
#define MSD_BD_IN ep1Bi
#define MSD_BD_OUT ep1Bo