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6. The host can bring CS high at any time after receiving the data block or a
data_error token.
7. The host generates 8 clock cycles to complete the command.
In a command that reads multiple blocks, step 5 repeats as many times as
needed to transfer the data blocks. Steps 6 and 7 occur when any of the fol-
lowing is true: the card has sent the requested number of data blocks, the
card has sent a data_error token, or the host has sent a
STOP_TRANSMISSION command (CMD12).
Commands that Write Data to the Storage Media
On an SPI bus, a command that writes a single data block to the storage
media has these steps:
1. The host brings CS low.
2. The host sends the 48-bit command followed by clock cycles.
3. After between 8 and 64 clock cycles, the card sends the command's
response.
4. After 8 or more clock cycles, the host sends a data block in a data token
and continues to generate clock cycles.
5. The card sends a data_response token immediately after receiving the
data token. If the card received the data token without error, the card fol-
lows the data_response token with continuous busy tokens (by holding
DataOut low) until the controller has finished programming the data block
into the storage media. The card then brings DataOut high.
6. The host can bring CS high any time after writing the data tokens or
receiving a data_error token. If the host brings CS high before DataOut
goes high, the host must bring CS low again and read DataOut to verify that
the write operation completed
7. The host generates 8 clock cycles to complete the command.
In a command that writes multiple blocks, steps 4 and 5 repeat as many
times as needed to transfer the data blocks. After DataOut goes high to indi-
cate that the card has programmed the previous block, the host generates at
least 8 clock cycles before sending the next data block. The transfer ends
when any of the following is true: the card has received and programmed the
specified number of data blocks, the card has sent an error indication in a
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