Accessing Flash Memory Cards - USB Mass Storage: Designing and Programming Devices and Embedded Hosts - page 89

Table 4-5: The SSPSTAT register contains configuration and status information
for the SPI port.
Bit Name Description

0 BF Receive buffer full.

1 = SSPBUF is full.
0 = SSPBUF is empty.

1..5 - Unused in SPI mode.

6 CKE Clock select.

1 = transmit occurs on the transition from active to idle clock state.
0 = transmit occurs on the transition from idle to active clock state.

7 SMP Master mode:

1 = input data is sampled at the end of the data output time.
0 = input data is sampled in the middle of the data output time.
Slave mode: 0

This statement opens the SPI port for MultiMediaCard communications:
OpenSPI(SPI_FOSC_64, MODE_11, SMPMID);
The compiler file spi.h defines the parameters passed to the function.
SPI_FOSC_64 sets the sync_mode parameter to configure the port as an
SPI master with the clock equal to Fosc/64. Fosc is the frequency of the
microcontroller's OSC1/CLKI input. The clock speed must be less than or
equal to 400 kHz until the MultiMediaCard has initialized and the host has
read the card's CSD register. A setting of Fosc/64 meets this requirement if
Fosc is 25 Mhz or less.
MODE_11 sets the bus_mode parameter with CKE = 0 and CKP = 1, so
the clock's idle state is high and bits transmit on high-to-low clock transi-
tions.
SMPMID sets the smp_phase parameter with SMP = 0 to cause the chip to
sample DataOut in the middle of the clock cycle (on low-to-high clock tran-
sitions).

Writing a Byte
After configuring and enabling the port, device firmware can send a byte by
writing the value to SSPBUF. The shift register clocks the bits out on the
SDO/DataIn line without further intervention by firmware. When the byte
has been written, the BF bit in SSPSTAT equals zero. Any attempt to write
to SSPBUF while the register is sending data results in a collision. On a col-