Information Technology Reference
In-Depth Information
Firmware-controlled Ports
A microcontroller that doesn't have hardware SPI support can control all of
the communications in firmware. In addition to toggling CS to select and
deselect a card, the firmware must bring SCLK high and low as needed,
write each bit to transmit at the appropriate time on DataIn, and read each
received bit at the appropriate time on DataOut.
The MultiMediaCard SPI bus has no minimum required clock frequency or
duty cycle except that the clock's high and low pulses must be at least 10
nanoseconds wide. Firmware can toggle SCLK as needed without having to
worry about maintaining a frequency or duty cycle. The maximum SCLK
frequency is 20 Mhz, and the maximum rise and fall times are 10 nanosec-
onds. (For buses with more than 10 MultiMediaCards, the maximum
SCLK frequency is 5 Mhz and the maximum rise and fall times are 50 nano-
seconds.)
Transferring Data
The code excerpts that follow show how the PIC18F4550's SPI port sends
and receives data. Some of the information is specific to the chip, but other
microcontrollers with SPI ports use similar architectures to implement SPI
ports.
Default States
The host brings a card's CS line low to select the card. In MultiMediaCard
communications, when CS is low and the DataIn output isn't transmitting,
the host must hold DataIn high. When CS is low while the DataOut output
isn't transmitting and the card isn't busy, the card holds DataOut high.
When the clock is idle, the host must hold SCLK high. On completing a
command and any responses to it, the host brings the card's CS line high to
deselect the card.
SPI on the PIC18F4550
The PIC18F4550 has a Master Synchronous Serial Port (MSSP) module
that can be configured as an SPI or I 2 C port. The MSSP manages the send-
ing and receiving of data on an SPI or I 2 C bus. (I 2 C is another type of syn-
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