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mitting bytes on DataIn, when receiving bytes on DataOut, and at other
times as required by the MultiMediaCard specification.
Hardware Ports
The PIC18F4550 and other microcontrollers with hardware support for SPI
hosts contain these components:
• Three port pins to provide the SCLK output, DataOut input, and
DataIn output.
• One or more generic port pins to provide a firmware-controlled CS out-
put for each device. If a host has many devices to control, a host can use
an external decoder chip such as a 74HC138 to control the CS lines.
• One or more buffers to hold data waiting to transmit and received data.
• A clock source to drive the SCLK output.
• A shift register to clock data out on the DataIn line and clock data in on
the DataOut line.
• Configuration registers to enable setting clock polarity and phase, setting
the clock's frequency, and enabling the SPI port.
Many microcontrollers with SPI support also enable configuring the micro-
controller as either a host (master) or device (slave). For MultiMediaCard
communications, the microcontroller must be a host.
When the PIC18F4550's SPI port has been configured as a host, device
firmware can send and receive data by bringing CS low and writing to the
SPI buffer. Writing to the buffer causes SCLK to generate 8 clock cycles,
latching a bit from the buffer onto DataIn on each cycle.
Each write operation also reads a byte from the DataOut line into the buffer.
If there is no data to receive, firmware can ignore the received byte. To read
a byte when there is no data to send, firmware can write a byte that holds
the line in the idle state (FFh for MultiMediaCard communications). When
eight bits have been transferred, the port hardware copies the byte read on
DataOut from the shift register to the buffer, where firmware can access the
value.
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