Digital Signal Processing Reference
In-Depth Information
1
0.8
0.6
0.4
0.2
0
0
0.4
0.8
1.2
1.6
2
t / /
0
-10
-20
-30
-40
0
0.4
0.8
1.2
1.6
2
t / /
10 6
10 5
No bit alloc.
Opt. bit alloc.
10 4
10 3
10 2
10 -9
10 -7
10 -5
10 -3
Symbol error probability
Figure 17.23 . Example 17.3. Power minimization using bit allocation in DMT sys-
tems. Channel frequency response magnitude (top), channel frequency response in dB
(middle), and power per symbol for various bit error rates, for minimum-power design
and design with no bit allocation (bottom).
 
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