Bit allocation and power minimization - Signal Processing and Optimization for Transceiver Systems - page 462

q ( n )

σ 2

covar . I

s ( n )

M

s ( n )

M P J M

Σ −1

V h U h

H

Λ s

covar .

P − M

J − M

diagonal
matrix

unitary
matrix

unitary
matrix

0
zero padding

channel

ignore

precoder equalizer

Figure 14.3 . The optimal receiver structure expressed in terms of the SVD parameters
of the channel. The diagonal matrix Σ has diagonal elements equal to the largest M
singular values of H .

Figure 14.3 shows the optimal receiver structure expressed in this form. Note
that the optimal solution is such that the channel is diagonalized , because the
cascade of V h , H , and U h is the diagonal matrix Σ h , and this matrix is cancelled
at the transmitter by the diagonal equalizer

⎡ ⎤

1
σ h, 0

0 ... 0

⎣ ⎦ 1

σ h, 1

0 ... 0

Σ − 1 =[ Σ h ] − M

= . (14 . 37)

. . .

. . .

1
σ h,M− 1

0 0 ...

The simpler notation Σ will be used for [ Σ h ] M from now on. The form of
the solution is strikingly similar to the solutions for the ZF-MMSE and MMSE
receivers described in Secs. 12.4.4 and 13.6, respectively.

14.5.1 Other equivalent forms of the optimal transceiver

Some readers might wonder why the equalizer Σ − 1 is at the transmitter instead
of at the receiver. It is possible to rearrange the optimum structure such that
this diagonal equalizer is moved to the receiver as shown next.
With the optimal receiver matrix G written in the form (14.22), we found
that the effect of Σ g cancels in the expression for the transmitted power as seen
from Eqs. (14.23) and (14.24b). So we eliminated it from further discussion by
setting Σ g = I . The presence of an arbitrary Σ g changes G to

0] V g = Σ g [ U h ] M×J . G =[ Σ g

The corresponding receiver structure is shown in Fig. 14.4(a). Note that Σ − 1
g

appears at the transmitter, so that the zero-forcing constraint is unaffected.