Bit allocation and power minimization - Signal Processing and Optimization for Transceiver Systems - page 456

probabilities of error P e ( k ) (i.e., fixed set of c k ). Using the AM-GM inequality
(see Appendix A) in Eq. (14.8) we see that

M− 1

c k 2 b k [ F † F ] kk [ GG † ] kk

P trans =

k =0

c k 2 b k [ F † F ] kk [ GG † ] kk 1 /M

M− 1

≥ M

k =0

[ F † F ] kk [ GG † ] kk 1 /M

M− 1

c 2 b

=

k =0

c 2 b [ GG † ] kk 1 /M

M− 1 M− 1

[ F † F ] kk

= ,

k =0 k =0

where

c = M ( c k ) 1 /M ,
and we have used the fact that b = b k /M. Equality can be achieved in the
second line above if and only if the terms are identical for all k ,thatis,

c k 2 b k [ F † F ] kk [ GG † ] kk = A

for some constant A. Taking logarithms on both sides we get

log 2 c k + b k +log 2 [ F † F ] kk +log 2 [ GG † ] kk , =log 2 A

from which we obtain

b k = D − log 2 c k − log 2 [ F † F ] kk − log 2 [ GG † ] kk ,

where D is a constant. Using the expression for c k given in Eq. (14.9) we obtain

σ q
3

2

Q − 1 P e ( k )
4

− log 2 [ F † F ] kk − log 2 [ GG † ] kk . b k = D − log 2 (14 . 11)

This is called the optimum bit allocation or bit loading formula. The constant
D is chosen such that b k /M = b . Note that if the average bit rate b is large
enough then b k computed from this formula will be non-negative and can be
approximated well with integers. The formula (14.11) is similar to the water-
filling formula for power allocation discussed in Chap. 22 (Eq. (22.26)).
For any fixed pair of G and F , and a specified set of probabilities of error
{P e ( k )

, the bit allocation that minimizes the transmitted power is given by
Eq. (14.11). With the bit allocation so chosen, the quantities P k are computed
from Eq. (14.5) where σ e k is as in Eq. (14.7). With P k so chosen, the specified
probabilities of error are met, and the total power P trans is minimized. This
minimized power is given by

}

P trans = c 2 b [ GG † ] kk 1 /M

M− 1 M− 1

[ F † F ] kk . (14 . 12)

k =0 k =0