Introduction - Control of Power Inverters in Renewable Energy and Smart Grid Integration - page 41

The 2833x/2823x devices support eight external interrupts and up to 96 peripheral interrupts
through the Peripheral Interrupt Expansion (PIE) Block. The devices contain a watchdog timer
and support three low-power modes: IDLE, STANDBY and HALT.
The 2833x/2823x devices support a range of peripherals for embedded control, including:
ePWM (up to 6-channel): The enhanced PWM peripheral supports indepen-
dent/complementary PWM generation, adjustable dead-band generation for lead-
ing/trailing edges, latched/cycle-by-cycle trip mechanism. Three of the six PWM
pins support HRPWM features. The ePWM registers are supported by the DMA
to reduce the overhead for servicing this peripheral.
eCAP (up to six modules): The enhanced capture peripheral uses a 32-bit time
base and registers up to four programmable events in continuous/one-shot capture
modes. This peripheral can also be configured to generate an auxiliary PWM
signal.
eQEP (up to 2 modules): The enhanced QEP peripheral uses a 32-bit position
counter, supports low-speed measurement using capture unit and high-speed mea-
surement using a 32-bit unit timer. This peripheral has a watchdog timer to detect
motor stall and input error detection logic to identify simultaneous edge transition
in QEP signals.
ADC (one module with 16 channels): The ADC block is a 12-bit converter with 16
single-ended (0-3V) channels multiplexed through two built-in S/H. Conversion
rate can be up to 80 ns at 25-MHz ADC clock, 12.5 MSPS. It contains two sample-
and-hold units for simultaneous sampling. The ADC registers are supported by
the DMA to reduce the overhead for servicing this peripheral.
The 2833x/2823x devices also support a range of peripherals for communication, including:
eCAN: The enhanced CAN peripheral supports 32 mailboxes, time stamping of
messages, and is CAN 2.0B-compliant.
McBSP: The multichannel buffered serial port (McBSP) connects to E1/T1 lines,
phone-quality codecs for modem applications or high-quality stereo audio DAC
devices. The McBSP receive and transmit registers are supported by the DMA
to significantly reduce the overhead for servicing this peripheral. Each McBSP
module can be configured as an SPI as required.
SPI: The SPI is a high-speed, synchronous serial I/O port that allows a serial
bit stream of programmed length (one to sixteen bits) to be shifted into and out
of the device at a programmable bit-transfer rate. Normally, the SPI is used for
communications between the DSC and external peripherals or another processor.
Typical applications include external I/O or peripheral expansion through devices
such as shift registers, display drivers, and ADCs. Multi-device communications
are supported by the master/slave operation of the SPI. On the 2833x/2823x, the
SPI contains a 16-level receive and transmit FIFO for reducing interrupt servicing
overhead.