Digital Signal Processing Reference
In-Depth Information
10.3.1 RAM
RAM is memory that can be used for the storage of temporary data. When the power
supply is removed, the stored data is lost forever. In transponders, RAM is mainly used
for the temporary storage of data that exists briefly during operation in the interrogation
zone of a reader. In active transponders that have their own battery, RAMs with battery
backups are sometimes used for the long-term storage of data.
The main component of the (S)RAM memory cell is a D-flip-flop. Figure 10.32
shows the block diagram for a single memory cell. Each memory cell has the con-
nections DI (Data Input), WE (Write Enable) and DO (Data Out). If data is only to
be read from the memory cell, it is sufficient to activate the selected cell with logic 1
levels at the allocated address connections Y i and X i .
To write data to the memory cell, the WE connection must also be switched to the
1 level. If there is a 1 level at C1 input data is written to the flip-flop.
10.3.2 EEPROM
The operating principle of an EEPROM cell is based upon the ability of a capacitor
(condenser) to store electric charge over long periods. An EEPROM therefore repre-
sents a tiny capacitor that can be charged or discharged. A charged capacitor represents
a logic '1', a discharged capacitor represents a logic '0'.
In its simplest form, an EEPROM cell basically consists of a modified field effect
transistor on a carrier material (substrate) made of silicon. The EEPROM cell contains
an additional gate between the control gate of the field effect transistor and the substrate,
which is not connected to an external power supply, and which is positioned at a very
short distance (
10 nm) from the carrier material. This so-called floating gate can be
charged or discharged via the substrate using the tunnel effect, and therefore represents
a capacitor. For the tunnel effect to exist there must be a sufficiently large potential
difference at the thin insulating tunnelling oxidation layer between the floating gate
and the substrate (Figure 10.33).
The flow of current between source and drain can be controlled by the stored charge
of the floating gate. A negatively charged floating gate gives rise to a high threshold
X i
Y i
&
&
DO
&
C1 Q
WE
1D
D I
Figure 10.32 Simplified functional block diagram of a (S)RAM cell
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