Digital Signal Processing Reference
In-Depth Information
Table 2.4
Measured resistive values obtained from resistors built with transistors in the linear
region
Name Size
Sample 1 (M
)Sample2(M
) Mean Value (M
) R/Square (G
/
)
R
lin
,
1
140
µ
m/63
µ
m 127.5
130
128.75
286
R
lin
,
2
280
µ
m/127
µ
m 113.5
157.5
135.5
298
R
lin
,
3
560
µ
m/273
µ
m 120.5
124.5
122.5
251
R
lin
,
4
140
µ
m/85
µ
m 175.5
177
176.25
290
R
lin
,
5
140
µ
m/170
µ
m 333.5
398
365.75
301
R
lin
,
6
140
µ
m/260
µ
m 607.5
518
562.75
303
m 11 / 11 154
R
lin
,
8
140
µ
m/5
µ
m 6.9 6.8 6.85 192
A
V
SG
of 13.5V was applied during the measurements. All R are built with the layout in Fig.
2.23
,
except for
R
lin
,
7
−
R
lin
,
8
which are constructed like in
2.12
.
R
lin
,
7
140
µ
m/10
µ
than to extrapolate the model and rely on the simulated resistive values. A set of
resistors with varying
W
and
L
have been measured at a
V
SG
of 13.5V and with a
V
SD
close to 0V. The results are listed in Table
2.4
. The rectangular lay-out of the
resistors without fingers is Fig.
2.23
c.
The ratio of
W
L
for resistors
R
lin
,
1
−
3
is kept constant while the area is increased,
hence an identical resistance is expectedwith a better matching for larger area accord-
ing to Pelgrom's model (Pelgrom et al.
1989
). It is not the aim of the author to pro-
vide an elaborate statistical study here yet it is visible that the mean resistances of
R
lin
,
1
−
3
are similar. The resistors
R
lin
,
4
−
6
all have a 140
/
m width while the length
is increased with a factor 1,2, and 3, respectively. This results in resistive values
that are proportional to the length as expected. The mean resistance per square for
resistors
R
lin
,
1
−
6
amounts to 288M
µ
. Finally, two transistors
R
lin
,
7
−
8
with the
normal transistor lay-out (presented in Fig.
2.12
) have been measured. Their resis-
tance per square is notably lower and amounts to 170M
/
. It is difficult to draw
conclusions from those two but they give an estimation of the impedances that are
present in an analog organic circuit and accordingly they provide a lower boundary
for the resistance values of interest.
The advantage of these resistors is that the transistors are biased with a high gate
overdrive and accordingly their speed is high, higher than the speed of analog circuits
where transistors are biased with smaller gate overdrives, hence the bandwidth of
these resistors should not limit the speed of a circuit in which they are used. The
most important drawback of this type of resistors, on the other hand, is that the
V
SG
must be kept constant. Therefore, when a fixed gate bias voltage is applied the source
contact should be located on a virtual ground node and furthermore the drain voltage
must at any time stay below the source voltage, both to ensure a good linearity. Small
exceptions on previous limits can of course be allowed at the cost of linearity but the
elbowroom provided by this resistor architecture is rather limited.
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