Digital Signal Processing Reference
In-Depth Information
Insulator
Gate
Substrate
Substrate
Pentacene
Precursor
Step 4
Step 1
Source
Drain
Insulator
Gate
Gate
Substrate
Substrate
Step 5
Pentacene
Step 2
Source
Drain
Insulator
Insulator
Gate
Gate
Substrate
Substrate
Fig. 2.9 Step-by-step inkjet printed deposition of pentacene thin films (Molesa et al. 2004 )
circuit speed. By applying techniques that overcome the misalignment issue, self-
aligned transistors can be fabricated without a gate-source or gate-drain overlap.
This is typically done by using one of the two materials which are to be aligned as
the mask for the deposition of the other material. Figure 2.10 gives an example that
explains the production of a self-aligned top-gate thin-film transistor (Morosawa et
al. 2011 ).
 
 
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